A random access memory (“RAM”) type of memory device is typically associated with the main memory available to computers and similar devices. RAM type memory devices are often contrasted with a read-only memory (“ROM”) type of memory devices, which are typically associated with a special memory that is either not changed, or changed relatively infrequently. RAM devices mostly include SRAM and DRAM. ROM mostly includes flash memory, EPROM, OTP, EEPROM, PROM and ROM. Some devices such as NovRAM and Battery powered SRAM are hybrid devices using more than one technology.
Although SRAM is the memory device of choice for computer applications, with very fast access times, its volatility, large size and stand-by current limit the total size and applications of the memory. Nonvolatile memory devices such as flash memory are slower to program, and in some cases must be erased a large block at a time before being reprogrammed. DRAM has the smallest cell size, but necessitates a complex refresh algorithm, and is volatile. For new applications in portable applications such as cell phones, personal digital assistants (PDA), digital cameras, and removable “key-chain” or “USB” memory devices, nonvolatility and low power consumption are desirable properties.
Regardless of how the memory devices are used, RAM and ROM overlap in many respects. Both types of memory devices can allow random access reads. Both types of memory can be relatively fast or relatively slow. Although all ROM devices are nonvolatile, so are some RAMs. Although most ROMs cannot change their data once programmed, some ROMs can be re-programmed. RAM, however, is always re-writable.
The ROMs that are capable of data modification typically require long write cycles that erase entire blocks of data prior to new data being written. For example, UV light might be applied to an entire memory block in order to “repair” fused connections so that the block can be re-written with new data. RAM, on the other hand, can read or write to a randomly accessed byte of memory, typically performing either operation in a standard cycle.
Conventional nonvolatile RAM and ROM devices require three terminal MOSFET-based structures. The layouts of such devices are not ideal, as they require large feature sizes for each memory cell.
However, not all memory elements require three terminals. Certain complex metal oxides (CMOs), for example, can retain a resistive state after being exposed to an electronic pulse, which can be generated from two terminals. For example, materials having a perovskite structure, among them colossal magnetoresistance (CMR) materials and high temperature superconductivity (HTSC) materials, are materials that have electrical resistance characteristics that can be changed by external influences. For instance, the properties of materials having perovskite structures, especially for CMR and HTSC materials, can be modified by applying one or more short electrical pulses to a thin film or bulk material. The electric field strength or electric current density from the pulse, or pulses, is sufficient to switch the physical state of the materials so as to modify the properties of the material. The pulse is of low enough energy so as not to significantly damage the material. Multiple pulses may be applied to the material to produce incremental changes in properties of the material. One of the properties that can be changed is the resistance of the material. The change may be at least partially reversible using pulses of opposite polarity from those used to induce the initial change. Similarly, magnetic RAM (MRAM) requires only two terminals to deliver a magnetic field to the memory element. Other two terminal devices include Ovonic Unified Memory (OUM), which uses chalcogenic layers of material, and various types of ferroelectric memory. With only two terminals, it has been theorized that a resistive memory structure can be arranged in a cross point architecture.
Accordingly, it is desirable to provide a high density resistive memory structure. Further, it is desirable to provide a resistive memory structure utilizing a cross-point array of non-linear electrodes. Also, it is desirable to provide a method for fabricating high density resistive memory structures. Furthermore, other desirable features and characteristics will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and this background.